1. Field
The present invention relates to a semiconductor device.
2. Description of the Related Art
In recent years, power conversion apparatuses using semiconductor devices, direct conversion circuits, for example matrix converters, are known, which can eliminate a DC smoothing circuit composed of an electrolytic capacitor and a DC reactor in AC/AC conversion, AC/DC conversion, or DC/AC conversion (AC stands for alternating current and DC stands for alternating current). A matrix convertor is composed of a plurality of AC switches. The AC switch, which is imposed by an AC voltage, needs a construction ensuring certain magnitude of bias blocking capabilities in both forward and reverse directions (a forward bias blocking capability and a reverse bias blocking capability). Thus, bidirectional switching devices are attracting attention from the viewpoint of improvements in size, weight, efficiency, response time, and cost of a circuit. A type of known bidirectional switching device is composed of two antiparallel-connected reverse blocking IGBTs (insulated gate bipolar transistors).
A reverse blocking IGBT includes an active region having an IGBT construction and an isolation region formed at a peripheral edge of a semiconductor substrate and across the substrate from one principal surface to the other principal surface. An edge termination structure is provided between the active region and the isolation region for mitigating electric field strength at a pn junction composing the IGBT construction to ensure a desired withstand voltage. A voltage withstanding structure includes field limiting rings (herein after abbreviated to FLRs) of floating p type regions, for example, and field plates (hereinafter abbreviated to FPs) that are conductive films electrically connected with the FLRs.
Japanese Unexamined Patent Application Publication No. 2004-336008 discloses a reverse blocking IGBT with a substrate thickness of not larger than 150 μm, the IGBT comprising an isolation diffusion region formed utilizing a trench for forming an isolation region in the first principal surface side.
Japanese Unexamined Patent Application Publication No. 2005-101254 discloses another device in which at least conductive field plates on the innermost field insulation film and the next outer field insulation film extend towards outer circumference, and at least conductive field plates on the outermost field insulation film and the next inner field insulation film extend towards inner circumference.
It is known that an edge termination structure of a reverse blocking IGBT comprises an edge termination structure for forward bias section for ensuring a forward bias blocking capability and an edge termination structure for reverse bias section for ensuring a reverse bias blocking capability.
FIG. 5 is a sectional view of an edge termination structure of a conventional reverse blocking IGBT. Referring to FIG. 5, the edge termination structure 120 of the reverse blocking IGBT comprises an edge termination structure for forward bias section 140 in the side of an active region 100, and an edge termination structure for reverse bias section 150 in the side of an isolation region 130. At the boundary between the edge termination structure for forward bias section 140 and the edge termination structure for reverse bias section 150, an intermediate channel stopper part 160 is provided that is a region not depleted on application of either forward voltage or reverse voltage. The intermediate channel stopper part 160 can consist of an n+ channel stopper region 161 formed in a surface region of an n− drift region 101 and a FP 162 in electrical connection with the n+ channel stopper region 161.
In this specification and accompanying drawings, a layer or region that are preceded by n or p means that majority carriers are electrons or positive holes, respectively, in that region. The signs “+” or “−” added to the n or p means that a layer or a region with the sign contains higher or lower concentration of impurities, respectively, than a layer or a region without the sign.
Japanese Unexamined Patent Application Publication No. 2006-319218 discloses a reverse blocking IGBT having an intermediate channel stopper part. This reverse blocking IGBT is provided with a trench at outer peripheral region of a semiconductor substrate for the IGBT, the substrate comprising a p+ type collector region, an n− type base region, a p type base region, and an n+ type emitter region. The trench is formed passing through the n− type base region reaching the p+ type collector region. A conductor layer is formed on the surface of the trench via a dielectric layer opposing the side wall of the n− base region and in connection with the p+ type collector region. A field plate effect of the conductor layer enhances the blocking voltage capability of the IGBT. The IGBT further comprises p type forward blocking voltage-improving semiconductor regions, an n+ type channel stopper region, and p type reverse blocking voltage-improving semiconductor regions. On the n+ type channel stopper region, an electrode is disposed for stabilizing the electric potential at this place.
Japanese Unexamined Patent Application Publication No. 2005-252212 discloses another device comprising a MOS gate structure, a p+ isolation region, and a p+ collector layer. The MOS gate structure includes a p+ base layer formed on the surface region of an n− drift layer, an n+ emitter region formed on the surface region of the p+ base layer, a gate oxide film deposited on the surface of a part of the p+ base layer between the n− drift layer and the n+ emitter region, and an gate electrode deposited on the gate oxide film. The p+ isolation region is formed surrounding the MOS gate structure via the n− drift layer and connecting the front-side and backside surfaces of the n− drift layer. The p+ collector layer is formed on the backside surface of the thinned n− drift layer and exposing to the backside surface, and in connection with the p+ isolation region. A voltage withstanding structure is formed between an emitter electrode and the p+ isolation region, the emitter electrode being formed on the MOS gate structure.
Several number of field limiting layers and several number of field limiting electrodes are formed towards the p+ isolation region side. In the middle region of the edge termination structure, an intermediate electric field relaxation region is formed.
The technology disclosed in Japanese Unexamined Patent Application Publication No. 2005-101254 must be provided with a structure to prevent the n− drift region from complete depletion in a conducting state. This is because, upon forward voltage application, a depletion layer expanding from the p channel region in the active region to the n− drift region may arrive at the p isolation layer in the isolation region and connect the p channel region to the p isolation layer through the depletion layer. Thus, a conducting state takes place at a lower voltage than the intended voltage. Reverse voltage application may also cause the similar problem when a depletion layer expanding from the p isolation layer arrives at the p channel region. However, Patent Document 2 is silent on a structure to solve this problem. The technology of Patent Document 1 also does not describe a detailed construction of a voltage withstanding structure.
On the other hand, Japanese Unexamined Patent Application Publication No. 2006-319218 and Japanese Unexamined Patent Application Publication No. 2005-252212 disclose some structures to solve the above-mentioned problem. For example, a structure, an intermediate channel stopper part 160 as shown in FIG. 5, is disclosed, in which an n+ channel stopper region 161 provided in the n− drift region 101 obstructs expansion of the depletion layer 171 from the side of the active region 100 on application of a forward voltage and expansion of a depletion layer 172 from the side of the isolation region 130 on application of a reverse voltage.
The intermediate channel stopper part 160 completely separates an edge termination structure for forward bias section 140 in which the depletion layer 171 expands on application of a forward voltage and an edge termination structure for reverse bias section 150 in which the depletion layer 172 expands on application of a reverse voltage interposing the intermediate channel stopper part 160 therebetween. As a result, the n− drift layer 101 under the intermediate channel stopper part 160 is not depleted, generating a region that cannot contribute to voltage blocking performance of the edge termination structure 120. In addition, the provision of the intermediate channel stopper part 160 elongates the edge termination structure 120 in the direction from the active region 100 towards the peripheral edge of the semiconductor substrate.
A reverse blocking IGBT provided with an intermediate channel stopper part, as described above, generally comprises an edge termination structure for forward bias section and an edge termination structure for reverse bias section. As a result, this type of reverse blocking IGBT tends to have a longer edge termination structure as compared with an IGBT without a reverse blocking structure. This situation remains when the n+ channel stopper region is replaced by a p channel stopper region as well. This increase in a length of the edge termination structure inhibits miniaturization of a reverse blocking IGBT.